All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size ROM
size EEPROM
size Common
SFRs
Features Configuration Bits RAM map SFR map

PIC12CE518
CONFIG (address:0x0FFF, mask:0x001F, default:0x001F)
OSC -- Oscillator selection bits (bitmask:0x0003)
OSC = LP | 0x0FFC | LP oscillator.
OSC = XT | 0x0FFD | XT oscillator.
OSC = IntRC | 0x0FFE | internal RC oscillator.
OSC = ExtRC | 0x0FFF | external RC oscillator.
WDT -- Watchdog timer enable bit (bitmask:0x0004)
WDT = OFF | 0x0FFB | WDT disabled.
WDT = ON | 0x0FFF | WDT enabled.
CP -- Code protection bit (bitmask:0x0008)
CP = ON | 0x0FF7 | Code protection on.
CP = OFF | 0x0FFF | Code protection off.
MCLRE -- MCLR enable bit (bitmask:0x0010)
MCLRE = OFF | 0x0FEF | MCLR tied to VDD, (Internally).
MCLRE = ON | 0x0FFF | MCLR pin enabled.

This page generated automatically by the device-help.pl program (2016-08-21 09:07:38 UTC) from the 8bit_device.info file (rev: 1.31) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.