All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size ROM
size EEPROM
size Common
SFRs
Features Configuration Bits RAM map SFR map

PIC18F24K40
Bank 14 | Bank 15
--- | ---
PPSLOCK | 0xEA0
INT0PPS | 0xEA1
INT1PPS | 0xEA2
INT2PPS | 0xEA3
T0CKIPPS | 0xEA4
T1CKIPPS | 0xEA5
T1GPPS | 0xEA6
T3CKIPPS | 0xEA7
T3GPPS | 0xEA8
T5CKIPPS | 0xEA9
T5GPPS | 0xEAA
T2INPPS | 0xEAB
T4INPPS | 0xEAC
T6INPPS | 0xEAD
ADACTPPS | 0xEAE
CCP1PPS | 0xEAF
CCP2PPS | 0xEB0
CWG1PPSCWGINPPS | 0xEB1
MDCARLPPS | 0xEB2
MDCARHPPS | 0xEB3
MDSRCPPS | 0xEB4
RXPPS | 0xEB5
TXPPS | 0xEB6
SSP1CLKPPSSSPCLKPPS | 0xEB7
SSP1DATPPSSSPDATPPS | 0xEB8
SSP1SSPPSSSPSSPPS | 0xEB9
IPR0 | 0xEBA
IPR1 | 0xEBB
IPR2 | 0xEBC
IPR3 | 0xEBD
IPR4 | 0xEBE
IPR5 | 0xEBF
IPR6 | 0xEC0
IPR7 | 0xEC1
PIE0 | 0xEC2
PIE1 | 0xEC3
PIE2 | 0xEC4
PIE3 | 0xEC5
PIE4 | 0xEC6
PIE5 | 0xEC7
PIE6 | 0xEC8
PIE7 | 0xEC9
PIR0 | 0xECA
PIR1 | 0xECB
PIR2 | 0xECC
PIR3 | 0xECD
PIR4 | 0xECE
PIR5 | 0xECF
PIR6 | 0xED0
PIR7 | 0xED1
WDTCON0 | 0xED2
WDTCON1 | 0xED3
WDTPSL | 0xED4
WDTPSH | 0xED5
WDTTMR | 0xED6
CPUDOZE | 0xED7
OSCCON1 | 0xED8
OSCCON2 | 0xED9
OSCCON3 | 0xEDA
OSCSTATOSCSTAT1 | 0xEDB
OSCEN | 0xEDC
OSCTUNE | 0xEDD
OSCFRQ | 0xEDE
VREGCON | 0xEDF
BORCON | 0xEE0
PMD0 | 0xEE1
PMD1 | 0xEE2
PMD2 | 0xEE3
PMD3 | 0xEE4
PMD4 | 0xEE5
PMD5 | 0xEE6
RA0PPS | 0xEE7
RA1PPS | 0xEE8
RA2PPS | 0xEE9
RA3PPS | 0xEEA
RA4PPS | 0xEEB
RA5PPS | 0xEEC
RA6PPS | 0xEED
RA7PPS | 0xEEE
RB0PPS | 0xEEF
RB1PPS | 0xEF0
RB2PPS | 0xEF1
RB3PPS | 0xEF2
RB4PPS | 0xEF3
RB5PPS | 0xEF4
RB6PPS | 0xEF5
RB7PPS | 0xEF6
RC0PPS | 0xEF7
RC1PPS | 0xEF8
RC2PPS | 0xEF9
RC3PPS | 0xEFA
RC4PPS | 0xEFB
RC5PPS | 0xEFC
RC6PPS | 0xEFD
RC7PPS | 0xEFE
IOCAF | 0xF0A
IOCAN | 0xF0B
IOCAP | 0xF0C
INLVLA | 0xF0D
SLRCONA | 0xF0E
ODCONA | 0xF0F
WPUA | 0xF10
ANSELA | 0xF11
IOCBF | 0xF12
IOCBN | 0xF13
IOCBP | 0xF14
INLVLB | 0xF15
SLRCONB | 0xF16
ODCONB | 0xF17
WPUB | 0xF18
ANSELB | 0xF19
IOCCF | 0xF1A
IOCCN | 0xF1B
IOCCP | 0xF1C
INLVLC | 0xF1D
SLRCONC | 0xF1E
ODCONC | 0xF1F
WPUC | 0xF20
ANSELC | 0xF21
IOCEF | 0xF27
IOCEN | 0xF28
IOCEP | 0xF29
INLVLE | 0xF2A
WPUE | 0xF2D
HLVDCON0 | 0xF2F
HLVDCON1 | 0xF30
FVRCON | 0xF31
ZCDCON | 0xF32
DAC1CON0 | 0xF33
DAC1CON1 | 0xF34
CM2CON0 | 0xF35
CM2CON1 | 0xF36
CM2NCH | 0xF37
CM2PCH | 0xF38
CM1CON0 | 0xF39
CM1CON1 | 0xF3A
CM1NCH | 0xF3B
CM1PCH | 0xF3C
CMOUT | 0xF3D
CLKRCON | 0xF3E
CLKRCLK | 0xF3F
CWG1CLKCWG1CLKCON | 0xF40
CWG1ISM | 0xF41
CWG1DBR | 0xF42
CWG1DBF | 0xF43
CWG1CON0 | 0xF44
CWG1CON1 | 0xF45
CWG1AS0 | 0xF46
CWG1AS1 | 0xF47
CWG1STR | 0xF48
SCANLADRSCANLADRL | 0xF49
SCANLADRH | 0xF4A
SCANLADRU | 0xF4B
SCANHADRSCANHADRL | 0xF4C
SCANHADRH | 0xF4D
SCANHADRU | 0xF4E
SCANCON0 | 0xF4F
SCANTRIG | 0xF50
MDCON0 | 0xF51
MDCON1 | 0xF52
MDSRC | 0xF53
MDCARL | 0xF54
MDCARH | 0xF55
ADACT | 0xF56
ADCLK | 0xF57
ADREF | 0xF58
ADCON1 | 0xF59
ADCON2 | 0xF5A
ADCON3 | 0xF5B
ADACQ | 0xF5C
ADCAP | 0xF5D
ADPRE | 0xF5E
ADPCH | 0xF5F
ADCON0 | 0xF60
ADPREVADPREVL | 0xF61
ADPREVH | 0xF62
ADRESADRESL | 0xF63
ADRESH | 0xF64
ADSTAT | 0xF65
ADRPT | 0xF66
ADCNT | 0xF67
ADSTPTADSTPTL | 0xF68
ADSTPTH | 0xF69
ADLTHADLTHL | 0xF6A
ADLTHH | 0xF6B
ADUTHADUTHL | 0xF6C
ADUTHH | 0xF6D
ADERRADERRL | 0xF6E
ADERRH | 0xF6F
ADACCADACCL | 0xF70
ADACCH | 0xF71
ADFLTRADFLTRL | 0xF72
ADFLTRH | 0xF73
CRCDATACRCDATL | 0xF74
CRCDATH | 0xF75
CRCACCCRCACCL | 0xF76
CRCACCH | 0xF77
CRCSHFTCRCSHIFTL | 0xF78
CRCSHIFTH | 0xF79
CRCXORCRCXORL | 0xF7A
CRCXORH | 0xF7B
CRCCON0 | 0xF7C
CRCCON1 | 0xF7D
NVMADRNVMADRL | 0xF7E
NVMDAT | 0xF80
NVMCON1 | 0xF81
NVMCON2 | 0xF82
LATA | 0xF83
LATB | 0xF84
LATC | 0xF85
DDRATRISA | 0xF88
DDRBTRISB | 0xF89
DDRCTRISC | 0xF8A
PORTA | 0xF8D
PORTB | 0xF8E
PORTC | 0xF8F
PORTE | 0xF91
SSP1BUF | 0xF92
SSP1ADD | 0xF93
SSP1MSK | 0xF94
SSP1STAT | 0xF95
SSP1CON1 | 0xF96
SSP1CON2 | 0xF97
SSP1CON3 | 0xF98
RC1REGRCREG RCREG1 | 0xF99
TX1REGTXREG TXREG1 | 0xF9A
SP1BRGSP1BRGL SPBRG SPBRG1 SPBRGL | 0xF9B
SP1BRGHSPBRGH SPBRGH1 | 0xF9C
RC1STARCSTA RCSTA1 | 0xF9D
TX1STATXSTA TXSTA1 | 0xF9E
BAUD1CONBAUDCON BAUDCON1 BAUDCTL BAUDCTL1 | 0xF9F
PWM4DCL | 0xFA0
PWM4DCH | 0xFA1
PWM4CON | 0xFA2
PWM3DCL | 0xFA3
PWM3DCH | 0xFA4
PWM3CON | 0xFA5
CCPR2CCPR2L | 0xFA6
CCPR2H | 0xFA7
CCP2CON | 0xFA8
CCP2CAP | 0xFA9
CCPR1CCPR1L | 0xFAA
CCPR1H | 0xFAB
CCP1CON | 0xFAC
CCP1CAP | 0xFAD
CCPTMRS | 0xFAE
T6TMRTMR6 | 0xFAF
PR6T6PR | 0xFB0
T6CON | 0xFB1
T6HLT | 0xFB2
T6CLKT6CLKCON | 0xFB3
T6RST | 0xFB4
T4TMRTMR4 | 0xFB5
PR4T4PR | 0xFB6
T4CON | 0xFB7
T4HLT | 0xFB8
T4CLKT4CLKCON | 0xFB9
T4RST | 0xFBA
T2TMRTMR2 | 0xFBB
PR2T2PR | 0xFBC
T2CON | 0xFBD
T2HLT | 0xFBE
T2CLKT2CLKCON | 0xFBF
T2RST | 0xFC0
TMR5L | 0xFC1
TMR5H | 0xFC2
T5CON | 0xFC3
PR5T5GCON | 0xFC4
T5GATETMR5GATE | 0xFC5
T5CLKTMR5CLK | 0xFC6
TMR3L | 0xFC7
TMR3H | 0xFC8
T3CON | 0xFC9
PR3T3GCON | 0xFCA
T3GATETMR3GATE | 0xFCB
T3CLKTMR3CLK | 0xFCC
TMR1L | 0xFCD
TMR1H | 0xFCE
T1CON | 0xFCF
PR1T1GCON | 0xFD0
T1GATETMR1GATE | 0xFD1
T1CLKTMR1CLK | 0xFD2
TMR0TMR0L | 0xFD3
PR0TMR0H | 0xFD4
T0CON0 | 0xFD5
T0CON1 | 0xFD6
PCON0 | 0xFD7
STATUS | 0xFD8
FSR2L | 0xFD9
FSR2H | 0xFDA
PLUSW2 | 0xFDB
PREINC2 | 0xFDC
POSTDEC2 | 0xFDD
POSTINC2 | 0xFDE
INDF2 | 0xFDF
BSR | 0xFE0
FSR1L | 0xFE1
FSR1H | 0xFE2
PLUSW1 | 0xFE3
PREINC1 | 0xFE4
POSTDEC1 | 0xFE5
POSTINC1 | 0xFE6
INDF1 | 0xFE7
WREG | 0xFE8
FSR0L | 0xFE9
FSR0H | 0xFEA
PLUSW0 | 0xFEB
PREINC0 | 0xFEC
POSTDEC0 | 0xFED
POSTINC0 | 0xFEE
INDF0 | 0xFEF
INTCON | 0xFF2
PRODPRODL | 0xFF3
PRODH | 0xFF4
TABLAT | 0xFF5
TBLPTRTBLPTRL | 0xFF6
TBLPTRH | 0xFF7
TBLPTRU | 0xFF8
PCPCL | 0xFF9
PCLATH | 0xFFA
PCLATU | 0xFFB
STKPTR | 0xFFC
TOSTOSL | 0xFFD
TOSH | 0xFFE
TOSU | 0xFFF

SFR

SFR with alias name.

SFR on Access Area.

This page generated automatically by the device-help.pl program (2016-08-21 09:07:41 UTC) from the 8bit_device.info file (rev: 1.31) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.