All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size ROM
size EEPROM
size Common
SFRs
Features Configuration Bits RAM map SFR map

PIC16LF1705
Bank 0 | Bank 1 | Bank 2 | Bank 3 | Bank 4 | Bank 5 | Bank 6 | Bank 7 | Bank 8 | Bank 10 | Bank 12 | Bank 13 | Bank 28 | Bank 29 | Bank 30 | Bank 31
--- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | --- | ---
INDF0 | 0x000
INDF1 | 0x001
PCL | 0x002
STATUS | 0x003
FSR0FSR0L | 0x004
FSR0H | 0x005
FSR1FSR1L | 0x006
FSR1H | 0x007
BSR | 0x008
WREG | 0x009
PCLATH | 0x00A
INTCON | 0x00B
PORTA | 0x00C
PORTC | 0x00E
PIR1 | 0x011
PIR2 | 0x012
PIR3 | 0x013
TMR0 | 0x015
TMR1TMR1L | 0x016
TMR1H | 0x017
T1CON | 0x018
T1GCON | 0x019
TMR2 | 0x01A
PR2 | 0x01B
T2CON | 0x01C
TRISA | 0x08C
TRISC | 0x08E
PIE1 | 0x091
PIE2 | 0x092
PIE3 | 0x093
OPTION_REG | 0x095
PCON | 0x096
WDTCON | 0x097
OSCTUNE | 0x098
OSCCON | 0x099
OSCSTAT | 0x09A
ADRESADRESL | 0x09B
ADRESH | 0x09C
ADCON0 | 0x09D
ADCON1 | 0x09E
ADCON2 | 0x09F
LATA | 0x10C
LATC | 0x10E
CM1CON0 | 0x111
CM1CON1 | 0x112
CM2CON0 | 0x113
CM2CON1 | 0x114
CMOUT | 0x115
BORCON | 0x116
FVRCON | 0x117
DAC1CON0 | 0x118
DAC1CON1 | 0x119
ZCD1CON | 0x11C
ANSELA | 0x18C
ANSELC | 0x18E
PMADRPMADRL | 0x191
PMADRH | 0x192
PMDATPMDATL | 0x193
PMDATH | 0x194
PMCON1 | 0x195
PMCON2 | 0x196
RC1REGRCREG RCREG1 | 0x199
TX1REGTXREG TXREG1 | 0x19A
SP1BRGSP1BRGL SPBRG SPBRG1 SPBRGL | 0x19B
SP1BRGHSPBRGH SPBRGH1 | 0x19C
RC1STARCSTA RCSTA1 | 0x19D
TX1STATXSTA TXSTA1 | 0x19E
BAUD1CONBAUDCON BAUDCON1 BAUDCTL BAUDCTL1 | 0x19F
WPUA | 0x20C
WPUC | 0x20E
SSP1BUFSSPBUF | 0x211
SSP1ADDSSPADD | 0x212
SSP1MSKSSPMSK | 0x213
SSP1STATSSPSTAT | 0x214
SSP1CONSSP1CON1 SSPCON SSPCON1 | 0x215
SSP1CON2SSPCON2 | 0x216
SSP1CON3SSPCON3 | 0x217
ODCONA | 0x28C
ODCONC | 0x28E
CCPR1CCPR1L | 0x291
CCPR1H | 0x292
CCP1CONECCP1CON | 0x293
CCPR2CCPR2L | 0x298
CCPR2H | 0x299
CCP2CONECCP2CON | 0x29A
CCPTMRS | 0x29E
SLRCONA | 0x30C
SLRCONC | 0x30E
INLVLA | 0x38C
INLVLC | 0x38E
IOCAP | 0x391
IOCAN | 0x392
IOCAF | 0x393
IOCCP | 0x397
IOCCN | 0x398
IOCCF | 0x399
TMR4 | 0x415
PR4 | 0x416
T4CON | 0x417
TMR6 | 0x41C
PR6 | 0x41D
T6CON | 0x41E
OPA1CON | 0x511
OPA2CON | 0x515
PWM3DCL | 0x617
PWM3DCH | 0x618
PWM3CONPWM3CON0 | 0x619
PWM4DCL | 0x61A
PWM4DCH | 0x61B
PWM4CONPWM4CON0 | 0x61C
COG1PHR | 0x691
COG1PHF | 0x692
COG1BLKR | 0x693
COG1BLKF | 0x694
COG1DBR | 0x695
COG1DBF | 0x696
COG1CON0 | 0x697
COG1CON1 | 0x698
COG1RIS | 0x699
COG1RSIM | 0x69A
COG1FIS | 0x69B
COG1FSIM | 0x69C
COG1ASD0 | 0x69D
COG1ASD1 | 0x69E
COG1STR | 0x69F
PPSLOCK | 0xE0F
INTPPS | 0xE10
T0CKIPPS | 0xE11
T1CKIPPS | 0xE12
T1GPPS | 0xE13
CCP1PPS | 0xE14
CCP2PPS | 0xE15
COGINPPS | 0xE17
SSPCLKPPS | 0xE20
SSPDATPPS | 0xE21
SSPSSPPS | 0xE22
RXPPS | 0xE24
CKPPS | 0xE25
CLCIN0PPS | 0xE28
CLCIN1PPS | 0xE29
CLCIN2PPS | 0xE2A
CLCIN3PPS | 0xE2B
RA0PPS | 0xE90
RA1PPS | 0xE91
RA2PPS | 0xE92
RA4PPS | 0xE94
RA5PPS | 0xE95
RC0PPS | 0xEA0
RC1PPS | 0xEA1
RC2PPS | 0xEA2
RC3PPS | 0xEA3
RC4PPS | 0xEA4
RC5PPS | 0xEA5
CLCDATA | 0xF0F
CLC1CON | 0xF10
CLC1POL | 0xF11
CLC1SEL0 | 0xF12
CLC1SEL1 | 0xF13
CLC1SEL2 | 0xF14
CLC1SEL3 | 0xF15
CLC1GLS0 | 0xF16
CLC1GLS1 | 0xF17
CLC1GLS2 | 0xF18
CLC1GLS3 | 0xF19
CLC2CON | 0xF1A
CLC2POL | 0xF1B
CLC2SEL0 | 0xF1C
CLC2SEL1 | 0xF1D
CLC2SEL2 | 0xF1E
CLC2SEL3 | 0xF1F
CLC2GLS0 | 0xF20
CLC2GLS1 | 0xF21
CLC2GLS2 | 0xF22
CLC2GLS3 | 0xF23
CLC3CON | 0xF24
CLC3POL | 0xF25
CLC3SEL0 | 0xF26
CLC3SEL1 | 0xF27
CLC3SEL2 | 0xF28
CLC3SEL3 | 0xF29
CLC3GLS0 | 0xF2A
CLC3GLS1 | 0xF2B
CLC3GLS2 | 0xF2C
CLC3GLS3 | 0xF2D
ICDBK0H | 0xF9E
STATUS_SHAD | 0xFE4
WREG_SHAD | 0xFE5
BSR_SHAD | 0xFE6
PCLATH_SHAD | 0xFE7
FSR0L_SHAD | 0xFE8
FSR0H_SHAD | 0xFE9
FSR1L_SHAD | 0xFEA
FSR1H_SHAD | 0xFEB
STKPTR | 0xFED
TOSL | 0xFEE
TOSH | 0xFEF
The mirror of [PCL, PCLATH, ...] are not shown.

SFR

SFR with alias name.

This page generated automatically by the device-help.pl program (2016-08-21 09:07:40 UTC) from the 8bit_device.info file (rev: 1.31) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.