All Enhanced Extended Regular 12 bits 14 bits 16 bits RAM
size ROM
size EEPROM
size Common
SFRs
Features Configuration Bits RAM map SFR map

PIC16F627
CONFIG (address:0x2007, mask:0x3DFF, default:0x3DFF)
WDTE -- Watchdog Timer Enable bit (bitmask:0x0004)
WDTE = OFF | 0x3FFB | WDT disabled.
WDTE = ON | 0x3FFF | WDT enabled.
PWRTE -- Power-up Timer Enable bit (bitmask:0x0008)
PWRTE = ON | 0x3FF7 | PWRT enabled.
PWRTE = OFF | 0x3FFF | PWRT disabled.
FOSC -- Oscillator Selection bits (bitmask:0x0013)
FOSC = LP | 0x3FEC | LP oscillator: Low-power crystal on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
FOSC = XT | 0x3FED | XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
FOSC = HS | 0x3FEE | HS oscillator: High-speed crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN.
FOSC = ECIO | 0x3FEF | EC: I/O function on RA6/OSC2/CLKOUT pin, CLKIN on RA7/OSC1/CLKIN.
FOSC = INTOSCIO | 0x3FFC | INTRC oscillator: I/O function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
FOSC = INTOSCCLK | 0x3FFD | INTRC oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, I/O function on RA7/OSC1/CLKIN.
FOSC = ERIO | 0x3FFE | ER oscillator: I/O function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN.
FOSC = ERCLK | 0x3FFF | ER oscillator: CLKOUT function on RA6/OSC2/CLKOUT pin, Resistor on RA7/OSC1/CLKIN.
MCLRE -- RA5/MCLR pin function select (bitmask:0x0020)
MCLRE = OFF | 0x3FDF | RA5/MCLR pin function is digital input, MCLR internally tied to VDD.
MCLRE = ON | 0x3FFF | RA5/MCLR pin function is MCLR.
BOREN -- Brown-out Reset Enable bit (bitmask:0x0040)
BOREN = OFF | 0x3FBF | BOD Reset disabled.
BOREN = ON | 0x3FFF | BOD Reset enabled.
LVP -- Low-Voltage Programming Enable bit (bitmask:0x0080)
LVP = OFF | 0x3F7F | RB4/PGM pin has digital I/O function, HV on MCLR must be used for programming.
LVP = ON | 0x3FFF | RB4/PGM pin has PGM function, low-voltage programming enabled.
CPD -- Data Code Protection bit (bitmask:0x0100)
CPD = ON | 0x3EFF | Data memory code protected.
CPD = OFF | 0x3FFF | Data memory code protection off.
CP -- Code Protection bits (bitmask:0x3C00)
CP = ALL | 0x03FF | 0000h-03FFh code protected.
CP = 75 | 0x17FF | 0200h-03FFh code protected.
CP = 50 | 0x2BFF | Program memory code protection off.
CP = OFF | 0x3FFF | Program memory code protection off.

This page generated automatically by the device-help.pl program (2016-08-21 09:07:38 UTC) from the 8bit_device.info file (rev: 1.31) of mpasmx and from the gputils source package (rev: svn Unversioned directory). The mpasmx is included in the MPLAB X.